Expanded Storage (ES) is an all electronic random-access storage level in the storage hierarchy of a data processing system between the program execution storage level (main storage) and the electro-mechanical disk drive storage level. The primary advantage of ES is that it ran transfer its stored data to/from main storage (MS) much faster than can a disk drive. ES has an analogy to an electronic disk.
MS and ES are distinguished by each having a different type of absolute addressing structure. The MS addressing structure uses byte addressing units, and ES addressing structure uses page addressing units which contain 4096 bytes in S/390 machines but may be more or less in other machine architectures. MS and ES may be packaged in the same or different physical memory packages.
ES is a shared resource in the computing system, and its allocation has been controlled by the operating system (OS) control program which manages system operations, for example the IBM Multiple Virtual Storage (MVS) Operating System for S/370 and S/390 mainframes.
System efficiency is significantly improved by storing data on ES (instead of on a hard disk) when the data is going to be required soon by a program. The use of ES has been found to significantly improve the operating efficiency of a system, for example, when the data results of one program are stored in ES for use by a next program in a sequence of programs. For example, a billing program may generate invoices to be sent to customers, and the invoice results contain data used by a subsequently executed inventory updating program to update the inventory of a business by deleting invoiced items from the inventory, which is followed by an ordering program which uses the results of the inventory program to generate orders to vendors for replacement of the sold inventory, etc. The time for executing the sequence of programs has been greatly reduced by storing program data results on ES instead of on hard disk, resulting in faster computer operations for a business without any increase in the processor speed of the computer.
Since many programs use virtual addressing directed to MS, it is important that ES be usable automatically and transparently by a program using virtual addresses directed to MS. ES addresses are indirectly provided through MS page table entries having an associated external page table for ES. This manner of ES addressing through MS virtual addresses allows ES to be accessed indirectly through a requested MS virtual address in an instruction, wherein the requestor may not be aware that ES is being used. This indirection is provided through the MS translation process in translating requested MS virtual addresses in instructions.
An MS virtual address is translated to an MS real storage address by using the well-known set of segment and page tables initialized and managed by the operating system. Use of virtual addresses protects the system by not allowing its users to know where the virtually-addressed data actually resides in the real storage of the system.
Virtual address translation is often performed by using a hardware Dynamic Address Translation facility generally called DAT) which performs address translations in an S/370 or S/390 data processing system. The DAT facility does an address translation by first obtaining a Segment Table Designation (STD) that locates a Segment table and specifies its length. After the segment table is located using its STD, a Segment Index (SI) in the virtual address (being subjected to the address translation process) is used as an index in the segment table to find an entry containing a page table origin (PTO), which is used to access a page table. Then a Page Index (PI) in the virtual address is used as an index in the page table to obtain the address of a required page table entry (PTE) which, if its valid bit is set on, contains the real address of a corresponding page frame in main storage. The page frame is accessed to obtain the virtually addressed data.
For data integrity and security reasons, the STD and translation tables are not available to programs other than the Operating System (OS). Hence, only the OS and hardware are involved in the address translation operations. After each translation is completed, the absolute address of the addressed page frame is usually stored in a Translation Lookaside Buffer (TLB) from which it can be obtained much faster than again performing the involved translation process for later requests to the same page of data, The term, data, is herein inclusive of programs in storage which are not currently in an executable state.
The virtual concept of "hiperspaces" has greatly facilitated the use of ES by programs using virtual addresses in a system. Hiperspaces are virtual address spaces backed by data in real page frames in ES or in DASD. The page frames in a hiperspace are addressed indirectly through virtual addresses by the executing programs, in response to the translation of the virtual addresses.
When virtual address spaces, including virtual data spaces, are assigned to a program in the IBM MVS operating system, no real storage space (e.g. page frames in MS or ES) is assigned to the address space until a page in the virtual space is involved in program execution, and then only the virtual pages accessed by the program are assigned backing real page frames in MS and/or ES. Thus, when a program requests an instruction or data at a virtual address, an MS page frame assignment is then made through the virtual address translation process which finds a free page frame in MS, which address is placed in a Page Table Entry (PTE) having its valid bit set to a valid state. A corresponding ES page frame assignment may be made through ES assignment bits and flags in the same PTE.
A page is moved from ES to MS by copying the data in an ES page frame (at the source location) to an MS page frame (at the destination location), or visa versa, usually without erasing the original page at the source location.
Data has been moved between ES and MS in a number of ways taught in prior filed patent applications. One way is by using a move page instruction (MVPG) described and claimed in prior-cited application Ser. No. 07/424,797 (PO9-89-018), which teaches how MS virtual addresses can be used to transfer a page of data between a source location and a sink (destination) location in either direction within or between two random access electronic storages in a data processing system such as MS and ES. In that application, the source and sink locations may be in the same electronic medium or in different electronic media, of which the most important media to date have been the main storage (MS) and expanded storage (ES) of a data processing system.
The virtual addressing capability in the MVPG instruction of application Ser. No. 07/424,797 significantly differed from the invention in U.S. Pat. No. 4,476,524 (Brown et al). Brown's pagein and pageout instructions moved data between MS and ES using real MS and ES addresses. Brown's instructions did not have virtual addressing capability.
Synchronous page transfer processes were described in application No. 07/424,797 and Brown U.S. Pat. No. 4,476,524. A synchronous operation requires the requesting processor to wait until the page transfer is completed before it can process its next instruction.
An Asynchronous Data Mover Facility (ADM) using a single ADMF co-processor is described and claimed in prior application Ser. No. 07/816,917 (PO9-90-030). This ADMF facility can continuously transfer pages of data between source and sink locations at the request of the central processors in a data processing system. A single processor request can specify that any number of pages be moved from source locations to sink locations in the same electronic medium or in different electronic media, which may be MS and ES. Asynchronous operation means the requesting central processor can process other instructions while the ADMF co-processor is moving the requested pages. That is, the requesting processor can perform other work independently of the requested page transfers being done by the ADMF co-processor. Thus, the ADMF co-processor controls the moving of the requested pages in parallel with the execution of programs by the central processor.
A significant improvement in an MS/ES data mover facility (ADMF) is described and claimed in a following application serial number application (PO9-92-063) Ser. No. 08/012,187. This application teaches how a plurality of co-processors may be simultaneously processing ADMF requests in a single ADM Facility, how the ADMF work may be redistributed among the co-processors to efficiently perform the ADMF work, and how an ADM Facility can continue to operate even though one or more of its co-processors failed. This application also teaches how the co-processors in an ADM Facility can concurrently handle both ADMF requests and I/O requests from the central processors in a system.